Electronics demand more integrated circuits in an integrated circuit package while paradoxically providing less physical space in the system for the increased integrated circuits content. Some technologies primarily focus on integrating more functions into each integrated circuit. Other technologies focus on packing more integrated circuits into a single package. While these approaches provide more functions within an integrated circuit, they do not fully address the requirements for lower height, smaller space, and cost reduction.
Modern electronics, such as smart phones, personal digital assistants, location based services devices, servers, and storage arrays, are packing more integrated circuits into an ever-shrinking physical space with expectations for decreasing cost. Numerous technologies have been developed to meet these requirements. Some of the research and development strategies focus on new package technologies while others focus on improving the existing package technologies.
One proven way to reduce cost is to use package technologies with existing manufacturing methods and equipments. Paradoxically, the reuse of existing manufacturing processes does not typically result in the reduction of package dimensions. Existing packaging technologies struggle to cost effectively meet the ever-demanding integration of today's integrated circuits and packages.
There are numerous packaging approaches such as stacking multiple integrated circuit dice into a package, a package-in-package (PIP), a package on package (POP), or a combination thereof. It becomes increasingly complex to accommodate the numerous electrical connections to the each of the integrated circuits as more integrated circuits are packed into a single package.
For example, conventional vertically stacked multi-chip packages require space for forming electrical connections, such as with bond wires, and typically formed by spacers, such as silicon or interposers. Current spacers require additional steps and structures increasing manufacturing costs and decreasing manufacturing yields. These spacers also limit the amount of height reduction. Conventional PIP and POP configurations require space for the package integration and/or stack limiting the reduction of the package height.
In addition, high-speed digital systems may switch at a high rate, such as more than one gigahertz. At such switching speeds, switching currents radiate energy (noise) that interferes with sensitive analog circuits or even other digital circuits. Interference usually takes the form of signal crosstalk.
Electromagnetic interference (EMI) is a generic term for unwanted interference energies either conducted as currents or radiated as electromagnetic fields. EMI can emanate from electronic devices in several ways. Generally, voltages and currents from integrated circuits create electric and magnetic fields that radiate from the integrated circuit device. EMI radiating from such integrated circuit devices will vary in field strength and impedance according to the shape and orientation of the conductors, the distance from the conductors to any shielding provided by circuit components or by coupling to circuit components.
One typical scheme has been to provide a conductive enclosure to an electronic device so that EMI field lines will terminate on such enclosure. Unfortunately, conductive enclosures that contain the entire product or parts of the product can be very expensive. In addition, the need to increase integrated circuit density has led to the development of multi-chip packages in which more than one integrated circuit can be packaged.
The trend is to pack more integrated circuits and different types of integrated circuits into a single package require EMI shielding within the package. Typically, metallic or conductive enclosures isolate the various integrated circuits from each other in a package. These conductive enclosures must also be grounded so the EMI radiated energy may be absorbed by the system as opposed to being radiated into the environment or to other integrated circuits. These solutions add manufacture complexity, manufacturing cost, and hamper the size reduction of the multi-chip packages.
Further, as more integrated circuits and different types of integrated circuits are forming more complex multi-chip packages, it become increasingly important to test the integrated circuits prior to final assembly of the multi-chip packages. This ensures known good units (KGU) of the integrated circuits otherwise the multi-chip package yield may be adversely impacted as well as increasing the cost of the multi-chip package.
Thus, a need still remains for an integrated circuit package system providing low cost manufacturing, improved yield, and improved reliability. In view of the ever-increasing need to save costs and improve efficiencies, it is more and more critical that answers be found to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.